Method and apparatus for polishing a semiconductor device

ABSTRACT

A method and an apparatus for polishing a semiconductor wafer are provided. An initial thickness of the semiconductor wafer is actually measured to obtain a measured initial thickness value. First and second inter-positions are then set or determined with reference to the measured initial thickness value. The first and second inter-positions are predetermined taking into account any variation in the initial thickness of the semiconductor wafer. A polishing process is carried out under control to a motion of a polishing pad toward a stage, on which the semiconductor pad is held.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to a method and an apparatus forpolishing a semiconductor wafer. More specifically, the presentinvention relates to a method and an apparatus for polishing a waferlevel semiconductor device such as a wafer level chip size package,which will hereinafter referred to as W-CSP.

2. Background Information

All patents, patent applications, patent publications, scientificarticles, and the like, which will hereinafter be cited or identified inthe present application, will, hereby be incorporated by reference intheir entirety in order to describe more fully the state of the art towhich the present invention pertains.

In a series of manufacturing processes for a semiconductor device, aback-side polishing so called “back-grind” may be performed to polish aback-surface of a semiconductor wafer prior to dicing the wafer. Thisback-surface of the wafer is opposite a front-surface that has anintegrated circuit that includes the semiconductor device.

In the manufacturing processes, an encapsulation process may beperformed for encapsulating the wafer level semiconductor device with anencapsulation resin to form an encapsulated semiconductor package thatis incomplete as a product. This incomplete package is then polished tohave a required thickness and produce the W-CSP as the product.

The polishing process is also performed using a moveable polishing padthat polishes the semiconductor wafer surface. The polishing paddescends and contacts with the wafer surface for polishing the same. Thepolishing pad descends or moves closer to the wafer under adescending-speed control.

Japanese Laid-Open Patent Publication No. 9-155722 discloses aconventional process for polishing the semiconductor wafer and aconventional chemical mechanical polishing (CMP) apparatus therefor. Theconventional apparatus includes a polishing cloth made of a highly rigidmaterial, a suction table positioned over the polishing cloth, and asensor positioned over the suction table. The suction table has adownward face that holds the semiconductor wafer thereon. The suctiontable is also movable up and down. The suction table presses the waferto the polishing cloth for polishing the wafer with the polishing cloth.As the polishing process progresses, the suction table descends slowlyand slightly. The sensor detects a displacement of the suction table.Further, such a highly rigid polishing cloth prevents the wafer fromdownwardly sinking into the polishing cloth. Both the high rigidity ofthe polishing cloth and the detection of the displacement allow forhighly accurate control of the polishing amount.

Further description will be made of another conventionaldescending-speed control method involved in the polishing process. Apolishing pad descends, at a higher descending-speed, from a stand-byposition to a predetermined interposition A′ between the stand-bypositioned and the wafer surface. At the interposition A′, a reductionin the higher descending-speed commences and continues until the pad hasa predetermined lower descending-speed, which is the speed at which thepolishing pad contacts the polishing surface of the wafer. The abovereduction of the descending-speed relaxes impact force of a collisionbetween the polishing pad and the wafer, thereby avoiding or reducingpossible impact damage to the wafer. When the polishing pad has justpolished the wafer by a predetermined thickness or amount that is lessthan a finally required polishing-amount, the polishing pad ispositioned at a polishing-halfway-position B′ where a change or increasein the descending-speed from the lower descending-speed is commenced toallow the polishing pad to perform further the remaining polishingprocess at the increased descending-speed.

In accordance with the conventional method, the above interposition A′,at which the above speed reduction is commenced, can be determined bytaking into account unavoidable variation in the actual thickness of theunpolished wafer. The interposition A′ is set based on a sum of a giveninitial thickness value T1′ and a first compensation value α′, so that arelation A′=T1′+α′ is established, where T1′ and α′ are constant,respectively. Thus, the above interposition A′ is also fixed and givencommonly to various actual thicknesses of the unpolished wafers. Thefixed interposition A′ and the unavoidable variation of the actual waferthickness cause undesired variation in a first actual distance that isdefined between the unpolished wafer surface and the fixed interpositionA′.

If the actual thickness of the unpolished wafer is greater than thegiven initial thickness value T1′, then the first actual distance isshorter than a first necessary distance for avoiding or reducingpossible impact damage to the wafer. This causes the polishing pad toreach the polishing wafer surface at an insufficiently reduced speedthat is still higher than the above-described desired lowerdescending-speed, resulting in possible impact damage to the wafer. Ifthe actual thickness of the unpolished wafer is smaller than the giveninitial thickness value T1′, then the actual distance is longer than theabove-described necessary distance. This may avoid any possible impactdamage to the wafer, but causes unnecessary time consumption duringdescent or moving down of the pad at the lower descending-speed beforethe polishing pad reaches the polishing wafer surface. In this point ofview, it is desired that the actual thickness of the unpolished wafer issmaller than the given initial thickness value T1′.

The polishing-halfway-position B′, at which the above speed increase iscommenced, is set based on a sum of a finally required target thicknessvalue T2′ and a second compensation value β′, so that another relationB′=T2′+β′ is established, where T2′ and β′ are constant, respectively.Thus, the above polishing-halfway-position B′ is also fixed and commonlygiven to various actual thicknesses of the unpolished wafers. The fixedpolishing-halfway-position B′ and the unavoidable variation of theactual wafer thickness cause undesired variation in a second actualdistance that is defined between the unpolished wafer surface and thefixed polishing-halfway-position B′.

If the actual thickness of the unpolished wafer is greater than thegiven initial thickness value T1′, then the polishing pad polishes thewafer at the lower descending-speed by a sufficient thickness to avoidor to reduce any impact damage to the wafer before the polishing padreaches the polishing-halfway-position B′, and the descending-speed isincreased. If the actual thickness of the unpolished wafer is smallerthan the given initial thickness value T1′, then the polishing padpolishes the wafer at the lower descending-speed by a smaller thicknessthan the above sufficient thickness before the polishing pad reaches thepolishing-halfway-position B′, and the descending-speed is increased. Toavoid or to reduce any impact damage to the wafer, it is desired thatthe polishing pad polishes the wafer at the lower descending-speed untilcutting blades of the polishing pad are well-engaged into the wafersurface and the polishing process is stabilized. In this point of view,it is desired that the actual thickness of the unpolished wafer isgreater than the given initial thickness value T1′.

Consequently, any substantive variations in the actual thickness of theunpolished wafer from the given initial thickness value T1′ causeseither one of the above two disadvantages.

In accordance with the CMP apparatus disclosed in the above-describedJapanese publication, the sensor detects the displacement of the suctiontable in order to monitor the polishing amount and then control thepolishing process based on the monitored polishing amount. It should benoted that the CMP apparatus does not control the descending-speed ofthe suction table.

In the above-described circumstances, it had been desired to establishor to develop a certain polishing technique free from the abovedisadvantages caused by the unavoidable variation in the actualthickness of the wafer.

In view of the above, it will be apparent to those skilled in the artfrom this disclosure that there exists a need for an improved a methodand an apparatus for polishing a semiconductor device. This inventionaddresses this need in the art as well as other needs, which will becomeapparent to those skilled in the art from this disclosure.

SUMMARY OF THE INVENTION

In accordance with a first aspect of the present invention, a method ofpolishing a semiconductor wafer on a first stage surface of a polishingstage is provided with a polishing pad. The method includes the stepsof: measuring an initial thickness of the semiconductor wafer to obtaina measured initial thickness value; setting a first speed-changingposition between a stand-by position of the polishing pad and the firststage surface, the first speed-changing position being distanced fromthe first stage surface by a first sum of the measured initial thicknessvalue and a first correction value; setting a second speed-changingposition between the stand-by position and the first stage surface, thesecond speed-changing position being distanced from the first stagesurface by a first remainder obtained by subtracting a second correctionvalue from the measured initial thickness value; causing the polishingpad to move, at a first moving-speed, from the stand-by position to thefirst speed-changing position; changing the first moving-speed to asecond moving-speed lower than the first moving-speed when the polishingpad reaches the first speed-changing position, to cause the polishingpad to contact with a first wafer surface of the semiconductor wafer atthe second moving-speed; and causing the polishing pad to polish thefirst wafer surface while maintaining the second moving-speed until thepolishing pad reaches the second speed-changing position.

In accordance with the present invention, the initial thickness of thesemiconductor wafer is measured to obtain a measured initial thicknessvalue. The first and second inter-positions are then set or determinedwith reference to the measured initial thickness value. The first andsecond inter-positions are predetermined, prior to the polishingprocess, taking into account any variation in the initial thickness ofthe semiconductor wafer. This ensures that possible impact damage to thesemiconductor wafer is reduced or avoided. This also allowsoptimizations of the first and second inter-positions to shorten a timeuntil the polishing pad reaches the polishing surface of thesemiconductor wafer, while reducing or avoiding impact damage to thesemiconductor wafer upon collision between them.

Other objects and further features of the present invention will beapparent from the following descriptions accompanying drawings and fromthe detailed description which follows.

These and other objects, features, aspects, and advantages of thepresent invention will become apparent to those skilled in the art fromthe following detailed description, which, taken in conjunction with theannexed drawings, discloses a preferred embodiment of the presentinvention.

BRIEF DESCRIPTION OF THE DRAWINGS

Referring now to the attached drawings which form a part of thisoriginal disclosure:

FIG. 1 is a schematic view illustrating a polishing apparatus inaccordance with the first preferred embodiment of the present invention;

FIG. 2 is an enlarged fragmentary schematic view illustrating first tofourth speed-changing positions of the polishing apparatus of FIG. 1;

FIG. 3 is a fragmentary schematic view illustrating a first relationshipof the first to fourth speed-changing positions and a first descendingmotion at a first descending speed of a polishing pad included in thepolishing apparatus of FIG. 1;

FIG. 4 is a fragmentary schematic view illustrating a secondrelationship of the first to fourth speed-changing positions and asecond descending motion at a second descending speed of the polishingpad included in the polishing apparatus of FIG. 1;

FIG. 5 is a fragmentary schematic view illustrating a third relationshipof the first to fourth speed-changing positions and a third descendingmotion at a third descending speed of the polishing pad included in thepolishing apparatus of FIG. 1;

FIG. 6 is a fragmentary schematic view illustrating a fourthrelationship of the first to fourth speed-changing positions and afourth descending motion at a fourth descending speed of the polishingpad included in the polishing apparatus of FIG. 1; and

FIG. 7 is a fragmentary schematic view illustrating a fifth relationshipof the first to fourth speed-changing positions and a first ascendingmotion at a first ascending speed of the polishing pad included in thepolishing apparatus of FIG. 1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Selected embodiments of the present invention will now be explained withreference to the drawings. It will be apparent to those skilled in theart from this disclosure that the following descriptions of theembodiments of the present invention are provided for illustration onlyand not for the purpose of limiting the invention as defined by theappended claims and their equivalents.

First Embodiment

(Polishing Apparatus)

FIG. 1 illustrates a polishing apparatus in accordance with the firstembodiment of the present invention. A polishing apparatus 100 includesa polishing stage 1, a polishing pad 2, a detector unit 3, and a controlunit 4. The polishing stage 1 has a first stage surface to hold asemiconductor wafer 5 thereon. The polishing pad 2 polishes thesemiconductor wafer 5. The detector unit 3 detects a first displacementG1 in the level of a polishing surface or upper surface of thesemiconductor wafer 5 and a second displacement G2 in the level of thefirst stage surface of the polishing stage 1. The control unit 4controls a vertical motion of the polishing pad 2 in a verticaldirection to the first stage surface. The polishing stage 1 isconfigured to hold the semiconductor device 5 on the first stage surfacepreferably by suction force.

The term “semiconductor wafer” means any one of a variety ofsemiconductor wafers, which include wafer-level semiconductor devicessuch as a wafer-level chip size package, and a semiconductor wafer freeof any device. For example, the semiconductor wafer may include awafer-level chip size package that has a polishing surface having anencapsulation resin such as an epoxy resin. Alternatively, thesemiconductor wafer may also have an elemental semiconductor substratesuch as a silicon substrate or a compound semiconductor substrate suchas a gallium arsenide substrate. In the later case, the polishingprocess has a back-grind. It should be noted that FIG. 1 illustrates thewafer-level chip size package that has a light-gray rectangular regionon the polishing stage 1 and a dark-gray rectangular region overlyingthe light-gray rectangular region. This wafer-level chip size packagewill thus be referred to as “semiconductor wafer”.

The polishing stage 1 also has a bottom center that is mechanicallyconnected with a first rotational axis of a first motor. The firstrotational axis and the first motor are not illustrated but haverespectively known structures. The polishing stage 1 rotates around thefirst rotational axis in a first rotational direction by rotation of thefirst motor. The polishing pad 2 has a top center that is mechanicallyconnected with a second rotational axis of a second motor. The secondrotational axis and the second motor are not illustrated but haverespectively known structures. The polishing pad 2 rotates around thesecond rotational axis in a second rotational direction opposite to thefirst rotational direction by rotation of the second motor. Thepolishing pad 2 has a polishing face that has a plurality of cuttingblades 2 a. The polishing pad 2 has a second center axis that is alwayskept to be off-set horizontally from a first center axis of thepolishing stage 1 by a predetermined horizontal distance. During apolishing process, the polishing pad 2 is arranged to be horizontallyoff-set from the polishing stage 1.

The detector unit 3 further includes a first level-sensor 3 a, a secondlevel-sensor 3 b, and first and second level-detectors 3 a′ and 3 b′.The first level-sensor 3 a is adapted to measure a variable level of thepolishing surface of the wafer 5. The second level-sensor 3 b is adaptedto measure a fixed level of the first stage surface of the polishingstage 1. The first level-sensor 3 a may be configured to be in contactwith the polishing surface of the wafer 5 to measure the variable levelthereof. Alternatively, the first level-sensor 3 a may also beconfigured to be distanced from the polishing surface of the wafer 5 tomeasure the variable level thereof. The second level-sensor 3 b may beconfigured to be in contact with the first stage surface of thepolishing stage 1 to measure the fixed level thereof. Alternatively, thesecond level-sensor 3 b may also be configured to be distanced from thefirst stage surface of the polishing stage 1 to measure the fixed levelthereof.

The first level-detector 3 a′ is mechanically coupled to the firstlevel-sensor 3 a, so that the first level-detector 3 a′ detects thefirst displacement G1 in level or vertical direction of the polishingsurface of the semiconductor wafer 5. This mechanical coupling can bemade by a known technique. The first level-detector 3 a′ converts thedetected first displacement G1 into a first displacement signal. Thefirst level-detector 3 a′ is also electrically coupled to the controlunit 4 to transmit the first displacement signal to the control unit 4.This electrical coupling can also be made by a known technique. Thesecond level-detector 3 b′ is mechanically coupled to the secondlevel-sensor 3 b so that the second level-detector 3 b′ detects thesecond displacement G2 in level or vertical direction of the first stagesurface of the polishing stage 1. This mechanical coupling can be madeby a known technique. The second level-detector 3 b′ converts thedetected second displacement G2 into a second displacement signal. Thesecond level-detector 3 b′ is also electrically coupled to the controlunit 4 to transmit the second displacement signal to the control unit 4.This electrical coupling is also made by a known technique.

As described above, the second center axis of the polishing pad 2 isoff-set from the first center axis of the polishing stage 1 to make anopen space over a first half part of the semiconductor wafer 5. In theopen space, the polishing pad 2 is absent. The first level-sensor 3 ais, however, present in the open space and positioned over the firsthalf part of the semiconductor wafer 5 in order to allow the firstlevel-sensor 3 a to contact the polishing surface of the first half partof the semiconductor wafer 5 during the polishing process. This allowsthe first level-sensor 3 a to measure or to sense the first displacementG1 continuously during the polishing process.

The control unit 4 is provided to control the vertical motion of thepolishing pad 2. The control unit 4 also respectively receives the firstand second displacement signals from the first and secondlevel-detectors 3 a′ and 3 b′. The control unit 4 calculates an initialthickness of the semiconductor wafer 5 based on the first and seconddisplacement signals. The control unit 4 sets plural inter-positionsbetween the polishing pad 2 and the polishing stage 1 based on thecalculated initial thickness of the semiconductor wafer 5. The controlunit 4 changes the speed of the vertical motion of the polishing pad 2with reference to the plural inter-positions.

(Setting Plural Speed-Changing Positions)

Prior to starting the polishing process, the control unit 4 sets firstto fourth speed-changing positions P1, P2, P3, and P4, at which thespeed of the vertical motion of the polishing pad 2 is changed. FIG. 2illustrates first to fourth speed-changing positions P1, P2, P3, and P4of the polishing apparatus of FIG. 1.

The first and second speed-changing positions P1 and P2 are set based ona measured initial thickness of the semiconductor wafer 5. The controlunit 4 respectively receives the first and second displacement signalsfrom the first and second level-detectors 3 a′ and 3 b′. The first andsecond displacement signals represent the first and second displacementsG1 and G2 measured by the first and second level-sensors 3 a and 3 b.

The first and second level-sensors 3 a and 3 b respectively measure thefirst and second displacements G1 and G2 in real time. The first andsecond level-detectors 3 a′ and 3 b′ respectively convert the detectedfirst and second displacements G1 and G2 into the first and seconddisplacement signals. The control unit 4 performs real time monitoringof a thickness of the semiconductor wafer 5 based on the first andsecond displacement signals, which respectively represent the detectedfirst and second displacements G1 and G2.

The control unit 4 calculates an initial thickness T1 of thesemiconductor wafer that has not yet been polished based on the firstand second displacement signals representing the first and seconddisplacements G1 and G2 measured by the first and second level-sensors 3a and 3 b. For example, the control unit 4 calculates an absolute valueof a difference between the first and second displacements G1 and G2,wherein the absolute value represents the initial thickness T1. Thecalculated initial thickness T1 is equal to the measured initialthickness of the semiconductor wafer 5 because the initial thickness T1is derived from both the first and second displacements G1 and G2.

The control unit 4 further calculates a first sum of the calculatedinitial thickness T1 with a first correction value “α” in order to setthe first speed-changing position P1 that is given by the calculatedfirst sum. The control unit 4 establishes a first relationship of“P1=T1+α.” The first correction value “α” is a predetermined constant.

The control unit 4 furthermore calculates a first remainder ofsubtracting a second correction value “β” from the initial thickness T1in order to set the second speed-changing position P2 which is given bythe calculated first remainder. The control unit 4 establishes a secondrelationship of “P2=T1−β.” The second correction value “β” is apredetermined constant. The calculated initial thickness T1 is equal tothe measured initial thickness of the semiconductor wafer 5 because theinitial thickness T1 is derived from both the first and seconddisplacements G1 and G2.

The first and second speed-changing positions P1 and P2 are calculatedby predetermined corrections to the initial thickness T1 measured by thedetector unit 3 to set the first and second speed-changing positions P1and P2 in consideration of unavoidable variations in the initialthickness of the unpolished semiconductor wafer 5. This means that firstand second distances of the first and second speed-changing positions P1and P2 from the unpolished surface of the semiconductor wafer 5 areconstant. When the polishing pad 2 reaches the first speed-changingposition P1, the control unit 4 reduces the higher speed of thepolishing pad 2 to a lower speed thereof. When the polishing pad 2reaches the second speed-changing position P2, the control unit 4increases the lower speed of the polishing pad 2 to a middle speed,i.e., a speed between the higher speed and lower speed.

It is required that the semiconductor wafer 5 be polished to have afinal target thickness T2, which is predetermined for each type of thesemiconductor wafer 5. The final target thickness T2 is different from ameasured thickness of the completely polished semiconductor wafer 5. Thethird and fourth speed-changing positions P3 and P4 are set withreference to the final target thickness T2 of the semiconductor wafer 5.

The control unit 4 predetermines or sets the final target thickness T2for each type of the semiconductor wafers 5. The control unit 4 furthercalculates a second sum of the final target thickness T2 with a thirdcorrection value “γ” in order to set the third speed-changing positionP3 which is given by the calculated second sum. The control unit 4establishes a third relationship of “P3=T2+γ”. The third correctionvalue “γ” is a predetermined constant.

The control unit 4 sets a fourth speed-changing position P4 withreference to the final target thickness T2. When the polishing pad 2reaches the third speed-changing position P3, the middle speed isreduced to the lowest speed. When the polishing pad 2 reaches the fourthspeed-changing position P4, the polishing pad 2 shows a moving changefrom the descent at the lowest speed to an ascent at the higher speed.

(Speed Control to Polishing Pad)

The above-described first to fourth speed-changing positions P1, P2, P3,and P4 have been set by the control unit 4 before the polishing processis started. FIGS. 3–7 illustrate relationships between thedescending-speed and ascending speed and the above-described first tofourth speed-changing positions P1, P2, P3, and P4 relative to thesemiconductor wafer 5 and/or the polishing stage 1. In this example, thepolishing pad 2 has a constant rotational rate. However, it is possibleas a modification to this embodiment that the polishing pad 2 exhibit avarying rotational rate. It is apparent from this disclosure that theaxis of rotation of the polishing pad 2 extends in a direction in adirection that is substantially or is perpendicular to the polishingsurface of the semiconductor wafer 5.

As shown in FIG. 3, the control unit 4 makes the polishing pad 2 descendtoward the semiconductor wafer 5 at a first speed or velocity V1 fromthe stand-by position P0 to the first speed-changing position P1. Thefirst speed V1 is the highest speed during the polishing process. Thefirst speed V1 may, for example, be at least 200 μm/min. Setting thefirst speed V1 as high as possible is effective to shorten the timeuntil the polishing pad 2 reaches the polishing surface of thesemiconductor wafer 5, while reducing or avoiding the impact damage tothe semiconductor wafer 5 upon collision between them.

As shown in FIG. 4, when the polishing pad 4 reaches the firstspeed-changing position P1, the control unit 4 reduces the first speedV1 to a second speed V2 which is lower than the first speed V1. Thesecond speed V2 may, for example, be 100 μm/min. The control unit 4makes the polishing pad 2 further descend at the second speed V2 fromthe first speed-changing position P1 toward the second speed-changingposition P2, until the polishing pad 2 comes into contact with anunpolished surface of the semiconductor wafer 5 at the secondspeed-changing position P2. After the polishing pad 2 contacts theunpolished surface of the semiconductor wafer 5, the polishing pad 2then polishes the surface of the semiconductor wafer 5 while maintainingthe second speed V2 until the polishing pad 2 reaches the secondspeed-changing position P2.

The reduction from the first speed V1 to the second speed V2 prior tothe contact between the polishing pad 2 and the semiconductor wafer 5avoids or reduces possible impact damage to the semiconductor wafer 5upon collision with the polishing pad 2 on descent. To avoid or toreduce the impact damage, it is important to reduce impact force appliedto the semiconductor wafer 5 upon contact between the polishing pad 2and the semiconductor wafer 5. It is also important to avoid applicationof any excessive force to the semiconductor wafer 5 until the polishingpad 2 is well-engaged with the polishing surface of the semiconductorwafer 5. The above-described speed control by the control unit 4 iseffective to reduce or to avoid the impact damage to the semiconductorwafer 5.

As described above, the first and second speed-changing positions P1 andP2 are set with reference to the initial thickness T1 obtained by themeasurement by the detector unit 3 to the actual thickness of theunpolished semiconductor wafer 5. Thus, the first and secondspeed-changing positions P1 and P2 are predetermined by taking intoaccount unavoidable variations in the actual initial thickness of theunpolished semiconductor wafer 5. This means that the first and seconddistances of the first and second speed-changing positions P1 and P2from the unpolished surface of the semiconductor wafer 5 are constant.This ensures that possible impact damage to the semiconductor wafer 5 bereduced or avoided.

The first and second speed-changing positions P1 and P2 as set inconsideration of unavoidable variations in the actual initial thicknessof the unpolished semiconductor wafer 5 also allows maximizing the firstdistance between the stand-by position P0 and the first speed-changingposition P1, while minimizing the second distance between the first andsecond speed-changing position P1 and P2. This allows shortening thetime until the polishing pad 2 reaches the polishing surface of thesemiconductor wafer 5, while reducing or avoiding the impact damage tothe semiconductor wafer 5 upon contact between them. When the polishingpad 2 reaches the second speed-changing position P2, the polishing pad 2may have already been well-engaged with the polishing surface of thesemiconductor wafer 5, and the polishing would have been stabilized.

As shown in FIG. 5, when the polishing pad 4 while polishing thesemiconductor wafer 5 at the second speed V2 reaches the secondspeed-changing position P2, the control unit 4 increases the secondspeed V2 to a third speed V3 which is higher than the second speed V2.The third speed V3 may, for example, be 200 μm/min. The control unit 4makes the polishing pad 2 continue to polish further the semiconductorwafer 5 while maintaining the third speed V3 until the polishing pad 2reaches the third speed-changing position P3. The increase from thesecond speed V2 to the third speed V3 shortens polishing time andincreases the polishing rate. After the polishing pad 2 has already beenwell-engaged with the polishing surface of the semiconductor wafer 5,and the polishing has been stabilized, the control unit 4 increases thepolishing rate or increases the second speed V2 to the third speed V3 toavoid any excessive damage to the semiconductor wafer 5.

As shown in FIG. 6, when the polishing pad 2 reaches the thirdspeed-changing position P3, the control unit 4 reduces the third speedV3 of the polishing pad 2 to a fourth speed V4 which is lower than thesecond and third speeds V2 and V3. Namely, the fourth speed V4 is thelowest speed. The fourth speed V4 may, for example, be at most 50μm/min. The control unit 4 makes the polishing pad 2 further polish thesemiconductor wafer 5 while maintaining the fourth speed V4 as a finaldressing process until the polishing pad 2 reaches the fourthspeed-changing position P4. The reduction from the third speed V3 to thefourth speed V4 is effective to ensure highly accurate control whenending the polishing process at a polishing-end position thatcorresponds to the fourth speed-changing position P4. Namely, when thepolishing pad 2 reaches the fourth speed-changing position P4, thethickness of the semiconductor wafer 5 has just been reduced to thefinal target thickness T2, and the polishing has just been completed andterminated.

As shown in FIG. 7, when the polishing pad 2 reaches the fourthspeed-changing position P4, the control unit 4 terminates the polishingprocess and makes the polishing pad 2 ascend or depart at the firstspeed V1 to the stand-by position P0 from the completely polishedsemiconductor wafer 5 having the final target thickness T2. As describedabove, the first speed V1 may, for example, be at least 200 μm/min.Setting the first speed V1 as high as possible is effective to shortenthe polishing process time.

It is also possible as a modification to the present invention that oneor more additional speed-changing positions to the above first to fourthspeed-changing positions are set prior to the polishing process.

In view of many possible embodiments to which the principles of thepresent invention may be applied, it should be recognized that thedetailed embodiments are illustrative only and should not be taken aslimiting the scope of the present invention.

This application claims priority to Japanese Patent Application No.2004-236976, the entire disclosure of which is herein incorporated byreference.

As used herein, the following directional terms “forward, rearward,above, downward, vertical, horizontal, below, and transverse” as well asany other similar directional terms refer to those directions of adevice equipped with the present invention. Accordingly, these terms, asutilized to describe the present invention should be interpretedrelative to a device equipped with the present invention.

The term “configured” as used herein to describe a component, section orpart of a device includes hardware and/or software that is constructedand/or programmed to carry out the desired function.

Moreover, terms that are expressed as “means-plus function” in theclaims should include any structure that can be utilized to carry outthe function of that part of the present invention.

The terms of degree such as “substantially,” “about,” and“approximately” as used herein mean a reasonable amount of deviation ofthe modified term such that the end result is not significantly changed.For example, these terms can be construed as including a deviation of atleast ±5% of the modified term if this deviation would not negate themeaning of the word it modifies.

While only selected embodiments have been chosen to illustrate thepresent invention, it will be apparent to those skilled in the art fromthis disclosure that various changes and modifications can be madeherein without departing from the scope of the invention as defined inthe appended claims. Furthermore, the foregoing descriptions of theembodiments according to the present invention are provided forillustration only, and not for the purpose of limiting the invention asdefined by the appended claims and their equivalents. Thus, the scope ofthe invention is not limited to the disclosed embodiments.

1. A method for polishing a semiconductor wafer comprising: placing thesemiconductor wafer on a first surface of a retainer, the semiconductorwafer having a second surface which is opposite to said retainer andwhich is to be polished by a polishing pad; measuring an initialthickness of the semiconductor wafer to obtain a measured initialthickness value; causing said polishing pad to relatively move at apredetermined first moving speed from a predetermined first position toa second position, said second position being set between said firstposition and said second surface, and being spaced from said firstsurface by a first sum of said measured initial thickness value of thesemiconductor wafer and a predetermined first correction value; andcausing said polishing pad to relatively move at a second moving speedfrom which is lower than said first moving speed from said secondposition to a third position while conducting an initial polishingprocess to polish said semicondictor wafer using said polishing pad,said third position being set between said second position and saidfirst surface, and being spaced from said first surface by a firstremainder obtained by subtracting a predetermined second correctionvalue from said measured initial thickness value.
 2. The method ofpolishing the semiconductor wafer according to claim 1, furthercomprising: predetermining a final target thickness value of thesemiconductor wafer, setting a polishing end position with reference tosaid final target thickness value, and conducting a post-polishingprocess following said initial polishing process to polish saidsemiconductor wafer until said polishing pad reaches said polishing endposition.
 3. The method of polishing the semiconductor wafer accordingto claim 2, further comprising: predetermining a third moving speedbeing higher than said second moving speed, predetermining a fourthmoving speed being lower than said first, second and third movingspeeds, and wherein conducting said post-polishing process furthercomprises conducting a first post-polishing process following saidinitial polishing process to polish said semiconductor wafer at saidthird moving speed, and conducting a second post-polishing processfollowing said first post-polishing process to polish said semiconductorwafer at said fourth moving speed.
 4. The method of polishing thesemiconductor wafer according to claim 3, further comprising:predetermining a third correction value, setting a fourth positionbetween said third position and said polishing end position, said fourthposition being spaced from said first surface by a second sum of saidfinal target thickness value and said third correction value, andwherein conducting said first post-polishing process comprises polishingsaid semiconductor wafer until said polishing pad reaches said fourthposition.
 5. The method of polishing the semiconductor wafer accordingto claim 4, wherein conducting said second post-polishing processcomprises polishing said semiconductor wafer until said polishing padreaches said polishing end position.